2026年9月10日

Global Semiconductor Manufacturing Capacity Distribution: An Informative Overview

Recently, the Organisation for Economic Co-operation and Development (OECD) released a report titled...

Recently, the Organisation for Economic Co-operation and Development (OECD) released a report titled “The Chip Landscape: Geographical Distribution of Wafer Fabrication Capacity.”

In the report, the OECD shares its best-available view of global wafer-fab capacity, drawing on its understanding and compilation of industry data. Below is an adapted translation and summary for readers. It is important to note that parts of the analysis are based on conclusions derived from SEMI and TechInsights datasets, along with desk research.

Given these data and methodology limitations, the findings should be interpreted with care.

Geographic distribution of capacity by process node

Figure 1 maps in-production wafer capacity (excluding capacity from fabs not yet online) across seven process-node density ranges for the five economies with the largest wafer capacity: Mainland China, Chinese Taipei, Korea, Japan, and the United States. As of September 2025, these five economies together account for 87% of global in-production wafer capacity.

Figure 1 also highlights how different economies hold distinct mixes of process nodes. Korea’s wafer capacity is particularly concentrated: nearly 80% of its capacity sits in the 6 nm to <22 nm range. This concentration is largely driven by Korea’s leading semiconductor producers—Samsung and SK hynix—which have invested heavily in memory manufacturing. Because most NAND and DRAM production relies on the 6 nm to <22 nm range, Korea’s node concentration is especially pronounced.

By contrast, U.S. wafer capacity is less clustered around a single node range and is more broadly distributed across multiple process nodes.

A large share of global production sits with a small number of companies

By capacity, the top 10 semiconductor companies account for roughly 50% of total global wafer capacity (WSPM). Figure 2 shows how companies are distributed across nine major semiconductor-producing economies.

Japan stands out for the number of operators: 73 companies run at least one fab, with total capacity above 5 million WSPM. The five largest—Kioxia, Sony, Toshiba, Micron, and Renesas—collectively exceed 3 million WSPM, representing 58% of Japan’s total. The remaining 42% is supplied by the other 68 fab operators.

In several other economies, production is more concentrated—particularly in Korea, Chinese Taipei, Singapore, and Germany. Mainland China is the only economy where the combined capacity share of the top five companies is below half of national total capacity.

Planned and under-construction capacity growth by economy

Figure 3 compares capacity across economies for fabs that are planned, under construction, and already in production. Most investment—both new builds and upgrades—remains concentrated in the largest semiconductor-producing economies, and is primarily driven by large semiconductor companies that already operate fabs in those regions.

The biggest projected capacity growth (WSPM) is seen in the United States, Mainland China, Korea, Chinese Taipei, Japan, Germany, and Singapore. In the rest of the world (RoW), India represents the largest share of incremental capacity.

Wafer capacity by chip type

Process-node density (nm) alone is not sufficient to evaluate the geographic distribution of wafer capacity. The underlying technology (chip type) and the business model (e.g., pure-play foundry versus IDM) also matter. When wafer capacity is analyzed by the types of chips a fab can produce, meaningful differences emerge.

A key caveat: in Figures 4 and 5, the same fab may be counted multiple times because each figure reflects different “capacity” categories. For example, a fab operated by Tower Semiconductor might offer BCD process technology for power semiconductors, RF SOI for analog/RF, and NVM for specialty memory. In that case, its capacity would be included in three categories: analog, power/discrete, and specialty memory.

Moreover, in each category, the fab’s full wafer capacity is counted. So if a fab has 40,000 wafers/month and supports both analog and specialty memory processes, that 40,000 may be counted twice—once in each category.

Because of these structural limitations, Figures 4 and 5 should be interpreted cautiously. The analysis also depends heavily on whether the underlying process-technology dataset is complete and accurate. If a fab’s process portfolio is not fully captured, results in Figures 4 and 6 can be materially skewed. Given the large variety of technologies across fabs and nodes, the dataset is likely incomplete. As a result, chip-type capacity shares should be treated as indicative rather than definitive.

1) Top economies by chip-type wafer capacity

Figure 4 presents total wafer capacity (WSPM) for six chip categories:

  • Power and discrete devices
  • Analog
  • Mature logic (≥20 nm)
  • Advanced logic (<20 nm)
  • Commodity memory (DRAM and NAND)
  • Specialty memory

The distinction between logic and memory categories is used for analytical purposes. For each chip type, Figure 4 shows the five economies with the highest total capacity, ranked by fab location rather than company headquarters. Dark shading represents in-production capacity, while lighter shading indicates capacity that is expected to come online (under construction and planned).

Mainland China and Chinese Taipei are the only two economies that rank in the top five across all six chip types. The United States and Japan follow closely, ranking in the top five for all types except commodity memory and advanced logic. Notably, if all planned U.S. commodity-memory projects come online, the U.S. would also appear in the top five across all six categories. Korea and Singapore also play important roles across multiple chip types.

By category:

Power/discrete capacity is led by Mainland China at 6.28 million WSPM, followed by Chinese Taipei (2.42 million) and Japan (1.60 million).

Analog capacity is also led by Mainland China at 3.64 million WSPM, followed by Chinese Taipei (2.09 million) and the United States (1.90 million).

For mature-node logic, in-production capacity is highest in Mainland China (4.23 million wafers/month), followed by Chinese Taipei (2.48 million) and Japan (1.24 million).

For advanced logic, Chinese Taipei leads with 1.55 million wafers/month, followed by the United States (0.84 million).

In commodity memory (DRAM and NAND), Korea dominates in-production capacity, but the same dominance does not necessarily extend to specialty memory such as NOR flash. Korea leads commodity memory with 4.58 million wafers/month, followed by Mainland China (2.37 million) and Japan (2.21 million).

In specialty memory, Chinese Taipei leads with 1.18 million wafers/month, followed by Mainland China (0.92 million), with the United States (0.67 million) also among the leading economies.

2) Economies with the largest expansion potential by chip type

Expansion potential is not evenly distributed across chip types or economies. Figure 5 provides a more granular view of incremental capacity by chip type and economy.

For some categories—especially commodity memory and advanced logic—new capacity is concentrated primarily in the economies that already lead in those segments. Meanwhile, additional capacity for power, analog, mature logic, and specialty memory also appears in other economies, though not enough to substantially shift the top-five rankings.

Only Mainland China and the United States show significant capacity growth across all six chip types. Most other economies’ expansion plans are more concentrated in specific chip categories.

By category:

For power semiconductors, incremental capacity is concentrated in Mainland China (+480,000 wafers/month), followed by Germany (+320,000) and Japan (+190,000). If these projects come online, the top five power-capacity economies would be Mainland China, Chinese Taipei, Japan, Germany, and the United States.

For analog, the United States leads planned additions (+0.64 million wafers/month), followed by Mainland China (+0.57 million) and Germany (+0.27 million). If projects are realized, the top five analog economies would be Mainland China, the United States, Chinese Taipei, Japan, and Germany.

For mature logic, planned additions are heavily concentrated in Mainland China. Its expected increase (+0.81 million wafers/month) exceeds the combined additions of the other six major economies in Figure 5 by more than three times. Japan (+0.18 million) and Germany (+0.09 million) together add +0.27 million. Based on the dataset, Chinese Taipei, the United States, and Korea show no meaningful planned additions in mature-logic capacity. This would place mature-logic leaders as Mainland China, Chinese Taipei, Japan, the United States, and Singapore.

For advanced logic, growth is concentrated in the United States (+620,000 WSPM), followed by Chinese Taipei (+470,000 WSPM). Together, their incremental capacity (1.09 million WSPM) is about twice the combined total of the other six economies shown (0.52 million WSPM). This would make the top five advanced-logic production locations Chinese Taipei, the United States, Korea, Mainland China, and Japan.

For commodity memory, Korea shows the largest increase (+2.36 million WSPM), exceeding the combined planned increases of the other economies in the figure. The United States (+1.71 million WSPM) and Mainland China (+0.38 million WSPM) are expected to become the second- and third-largest economies by commodity-memory capacity. If realized, the largest commodity-memory production economies would be Korea, Mainland China, Japan, Chinese Taipei, and the United States.

For specialty memory, planned additions are mainly in the United States (+0.074 million WSPM) and Chinese Taipei (+0.057 million WSPM). The top five specialty-memory economies remain Chinese Taipei, Mainland China, the United States, Japan, and Singapore.

3) Fabs with mixed manufacturing capabilities

Most fabs can manufacture more than one type of chip, which makes geographic analysis by chip type inherently challenging. Uneven dataset coverage also means some fabs cannot be confidently assigned to any chip-type category.

Figure 6 illustrates this manufacturing heterogeneity, excluding 375 unclassified fabs from the OECD database. It highlights overlaps among chip-type capabilities as well as fabs that appear unique to specific categories.

Key patterns include:

Specialty memory: Among 72 fabs capable of specialty memory, only one focuses exclusively on specialty-memory chips. About 12% also produce commodity memory. More than 80% also produce analog, power, or mature logic.

Mature logic (≥20 nm): Of 244 mature-logic fabs, about 25% produce only mature logic. Around 40% also produce analog and power semiconductors. Roughly 75% produce mature logic alongside other chip types.

Analog: Of 345 analog-capable fabs, only 27% are dedicated solely to analog. Most also produce power semiconductors or mature logic.

Power: The dataset includes 475 power-capable fabs. More than half (256) focus exclusively on power semiconductors—sharply contrasting with specialty memory, mature logic, and analog, where “mixed” fabs are more common.

Commodity memory: Among 79 commodity-memory fabs (e.g., NAND and DRAM), more than 88% do not produce any other chip type. Mixed fabs typically do not produce commodity memory.

Advanced logic (<20 nm): Of 48 advanced-logic fabs, nearly all (96%) focus exclusively on advanced logic.

In summary, analog, mature logic, and specialty memory are largely produced by fabs with multiple process technologies and flexible product mixes. For power semiconductors, exclusive manufacturing is more common. Commodity memory and advanced logic fabs are highly specialized and generally do not have the ability to manufacture other chip categories.

This prevalence of “mixed-capability” fabs—especially in mature logic and analog—complicates assessments of capacity balance across markets, including questions such as whether mature-logic capacity may become oversupplied.

4) Average fab scale by chip type

Assessing wafer capacity by chip type also sheds light on average fab scale. Figure 7 shows that the average fab size (in WSPM, 8-inch equivalent) varies significantly by chip category.

Power, analog, and mature-logic fabs average around 30,000–50,000 WSPM. Advanced-logic fabs—and especially commodity-memory fabs—are much larger. For example, several planned 12-inch commodity-memory fabs by Samsung, SK hynix, and Micron are expected to reach 150,000–200,000 WSPM, equivalent to roughly 330,000–450,000 WSPM in 8-inch equivalents.

As capital expenditure rises—driven largely by more complex and expensive equipment—commodity-memory and advanced-logic fabs continue to scale up to capture economies of scale. This is reflected in the larger average scale of advanced-logic fabs (72,000 WSPM) compared with mature-logic fabs (47,000 WSPM).

Ownership and wafer capacity

While the previous section focused on process technologies and chip types, this section examines ownership and business models. Figure 8 distinguishes wafer capacity owned by domestic versus foreign companies in each economy. Across the five economies with the greatest wafer capacity, most capacity is owned by domestic firms.

Despite the semiconductor value chain being highly cross-border and interdependent, a substantial share of capacity remains controlled by firms operating within their home economies. One possible explanation is that building fabs is capital-intensive and requires close coordination with specialized construction firms, technology and infrastructure suppliers, and complex regulatory environments—areas where local familiarity matters.

However, recent developments suggest foreign ownership shares may rise in some major manufacturing economies. For example, TSMC and Samsung are expanding capacity in the United States and Japan. In smaller semiconductor-producing economies—such as Singapore, Malaysia, Austria, and Ireland—foreign investors account for a significant portion of wafer capacity. Singapore and Malaysia, in particular, have been notably successful in attracting foreign fab investment.

It is also worth noting that ownership structures can be complex, and commercial datasets do not always capture them in detail. For example, STMicroelectronics is incorporated in the Netherlands, has its legal headquarters in Switzerland, and operates fabs in Singapore, France, and Italy (as of September 2024, ranked by capacity). Yet many commercial datasets classify it simply as a Swiss or Italian company. The OECD intends to improve tracking of ownership, headquarters location, and production sites in future updates of its semiconductor production database.

1) Wafer capacity by business model

Semiconductor manufacturing business models continue to evolve. Traditionally, fabs are operated either by pure-play foundries or by integrated device manufacturers (IDMs). However, some IDMs (e.g., Intel and Samsung) have adjusted their models by offering foundry services from some or all of their fabs—often described as “IDM-foundry.”

For geographic capacity analysis, business model becomes a critical dimension. This section distinguishes among:

  1. IDM capacity
  2. Pure-play foundry capacity
  3. IDM-foundry capacity

Foundry capacity can serve the broader market: any chip designer can use a foundry. By contrast, IDM-operated capacity is typically dedicated to the IDM’s own internal needs.

As purpose-built and application-optimized chips proliferate, more fabless companies and system firms design their own chips—driving increasing demand for foundry capacity. That makes it essential to evaluate the balance between IDM capacity and foundry (including IDM-foundry) capacity by region.

Figure 9 presents wafer-capacity data for the world’s top 50 semiconductor manufacturing companies, representing 82% of global wafer capacity (8-inch equivalent WSPM). The classification of IDM, IDM-foundry, and pure-play foundry is based on fab operating models, and capacity is assigned to the economy where the fab is physically located, not where the company is headquartered. The OECD secretariat notes it will continue improving data quality and classification accuracy.

Figure 9 indicates that most global foundry capacity is concentrated in Mainland China and Chinese Taipei. These are also the only two economies where more than 50% of domestic wafer capacity comes from foundries rather than IDMs.

While planned capacity additions may shift the IDM-to-foundry balance in some economies—especially in Japan and the United States—the report suggests that, in the U.S. case, even with increased IDM-foundry investment, more than half of total U.S. capacity would still remain IDM capacity.

Differences in business models across economies can be explained through both historical pathways and chip-type specialization. Commodity memory, for example, is produced entirely by IDMs, which helps explain why Korea has minimal pure-play foundry capacity: Korea’s two largest semiconductor firms, Samsung and SK hynix, are IDMs focused on commodity memory and logic. Japan’s ecosystem is another example that remains largely IDM-led.

Finally, Figure 9 is not exhaustive. Because it covers only the top 50 companies (82% of global capacity), some capacity expansion plans—such as those of certain Chinese IDMs—are not included. Future dataset updates aim to incorporate more companies with verified business-model classifications to strengthen accuracy and completeness.

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